AWG G3 PAD FOR PS3 Dokumentacja Pobierz pdf (Strona 52)

3 Hardware Components Master Clock System

52 System Reference, January 2001

All master clock sources are phase-locked on the distrib-

uted 10 MHz reference from one of the following:

• Digital clock domain’s AMC

• Analog clock domain’s AMC

(if no digital clock domain’s AMC is configured)

• Clock board in cardcage #1 on the 512-pin testhead or

#5 on the 1024-pin testhead (if no AMC is configured)

The following figures show the master clock distribution

on the 512-pin and 1024-pin testheads. The hardware

configuration and connections are shown in a simplified

for easy understanding.

The master clock generators on the clock boards in card-

cages #2 and #4 on the 512-pin testhead or cardcages #2,

#4, #6 and #8 on the 1024-pin testhead are used with the

same setting condition for analog modules, if the master

clock generated from the clock board is selected.

The master clock from the analog clock domain’s AMC is

split by the power splitter once, then the split clocks are

directly sent to the clock boards in the cardcages where

the analog modules are installed.

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AWG G3 PAD FOR PS3 Dokumentacja Strona 52